Insert-Type Packaging Mainly for Small and Medium-Scale ICs

Pin insertion packaging. This packaging form has pins that are directly inserted into the printed circuit board, followed by wave soldering using the dip soldering method to achieve circuit connection and mechanical fixation. Since neither the pin diameter nor the spacing can be too fine, the through-hole diameter, spacing, and even the routing on the printed circuit board cannot be too fine either. Moreover, it only uses one side of the printed circuit board, making it difficult to achieve high-density packaging. It can be further divided into: Single-ended packaging (pins at one end), Double-ended packaging (pins at both ends), and Pin Grid Array (PGA).

Single-ended packaging can be roughly divided into transistor packaging forms and single in-line package (SIP) forms.

Typical transistor pin insertion packaging forms include TO-92, TO-126, TO-220, TO-251, TO-263, etc., which are mainly used for signal amplification and power regulation.

Single In-line Package (SIP)

Pins are led out from only one side of the package, arranged in a straight line. The pin center spacing is typically 2.54mm, with a maximum of two to three dozen pins. When assembled onto the printed circuit board, the package stands upright. Its attractive feature is that it occupies very little circuit board area. However, in some systems, enclosed circuit boards limit the height and application of SIP packaging, and the insufficient number of pins results in unsatisfactory performance. Most are custom products, and its package shapes also include ZIP and SIPH.

Double-ended packaging can be roughly divided into Dual In-line Package (DIP), Z-shaped In-line Package (ZIP), and Shrink Dual In-line Package (SKDIP).

Dual In-line Package (DIP)

The vast majority of small and medium-scale integrated circuits use this packaging form, with pin counts generally not exceeding 100. DIP-packaged chips have two rows of pins distributed on both sides in a straight parallel arrangement, with a pin spacing of 2.54mm, requiring insertion into a chip socket with a DIP structure. Alternatively, they can be directly inserted into circuit boards with the same number of solder holes and geometric arrangement for soldering. Chips with this packaging should be handled with particular care when inserting or removing them from the chip socket to avoid damaging the pins. Its package structural forms include: multi-layer ceramic DIP, single-layer ceramic DIP, lead frame DIP, etc. This packaging has the following characteristics: 1. Suitable for through-hole soldering on printed circuit boards (PCB), easy to operate. 2. The ratio of chip area to package area is relatively large, hence the volume is also larger. 3. Apart from its external dimensions and pin count, there are no other special requirements. Dual in-line package with heat sink (DIPH) is mainly added for devices with power consumption greater than 2W.

Z-shaped In-line Package (ZIP)

It has no substantial difference from DIP, except that the pins are arranged in a Z-shape. The purpose is to increase the number of pins while maintaining a pin spacing of 2.54mm. Ceramic Z-shaped In-line Package (CZIP) has the same外形 as ZIP, but is packaged with ceramic material.

Shrink Dual In-line Package (SKDIP). The shape is the same as DIP, but the pin center spacing is 1.778mm, which is smaller than DIP (2.54mm). The pin count generally does not exceed 100, and the materials include both ceramic and plastic.

Pin Grid Array (PGA)

It was developed based on DIP to accommodate higher speeds and increased pin counts (improved assembly density). In this packaging, the pins are not arranged in single or double rows, but in a matrix pattern across the entire plane. There are multiple square arrays of pins on the inside and outside of the chip. Each square array of pins is arranged at regular intervals around the four sides of the chip. Compared with DIP, it can increase the pin count in an approximately square relationship without increasing the pin spacing. Depending on the number of pins, they can be arranged in 2 to 5 rings, with a pin spacing of 2.54mm and pin counts ranging from several dozen to several hundred.

PGA packaging has the following characteristics: 1. Insertion and removal operations are more convenient with high reliability; 2. It can accommodate higher frequencies; 3. When using a ceramic substrate with good thermal conductivity, it can also meet the requirements of high-speed, high-power devices; 4. Since this packaging has outward-extending pins, it generally uses insert-type mounting rather than surface mount; 5. When using ceramic substrates, the price is relatively high, so it is mostly used for more specialized applications. It is further divided into two types: pin array type and surface mount type.

Pin Array Type PGA

It is an insert-type package with vertical pins on the bottom surface arranged in a grid pattern. The packaging material basically uses multi-layer ceramic substrates (when the material name is not specifically indicated, most are ceramic PGA). It is used for high-speed large-scale logic LSI circuits and is relatively costly. The pin center spacing is typically 2.54mm, with pin counts ranging from several dozen to about 500, and pin length of approximately 3.4mm. To reduce costs, glass epoxy resin printed substrates can be used as the packaging base material instead. There are also plastic PGA packages with 64 to 256 pins.

Surface Mount Type PGA

It has grid-pattern pins on the bottom surface of the package, with lengths ranging from 1.5mm to 2.0mm. Mounting uses a bump soldering method with the printed substrate, hence it is also called bump soldering PGA. Because the pin center spacing is only 1.27mm, half that of insert-type PGA, the package body can be made smaller, while the pin count is larger than insert-type (250 to 528). It is a packaging form for large-scale logic LSI applications. The package base materials include multi-layer ceramic substrates and glass epoxy resin printed substrates. Packages made with multi-layer ceramic substrates have already been put into practical use.

Organic Pin Grid Array (OPGA). This packaging uses a glass fiber base, similar to the material used on printed circuit boards. This packaging method can reduce impedance and packaging costs.